1. Field of the Invention
The invention relates in general to a method for preventing a memory from generating a leakage current and a memory thereof, and more particularly to a method capable of preventing leakage current and preventing a memory from generating a leakage current and a memory thereof.
2. Description of the Related Art
The technology of non-volatile memory is widely used in many applications including the flash memory. Normally, the flash memory is a virtual ground array memory. During the process of erasing the memory cell of the flash memory, the threshold voltage of the memory cell is lowered.
Referring to FIG. 1, a perspective of a conventional flash memory is shown. The flash memory 100 includes a memory cell block 110 and a neighboring memory cell 122. The memory cell block 110 includes a boundary memory cell 112. FIG. 1 is exemplified by one row of memory cells, however, the invention is not limited thereto. The neighboring memory cell 122 is adjacent to the boundary transistor 112. During the process of erasing the left bit 113 of the boundary memory cell 112, since the erasing process is achieved according to the source side erasing technology, the right bit 123 of the neighboring memory cell 122 might be over-erased, such that the threshold voltage of the memory cell 122 is too low, and a leakage current flowing to the neighboring memory cell 122 might be generated by the boundary memory cell 112, severely affecting the normal operation of the boundary memory cell 112.
To resolve the above problem, the right bit 123 of the neighboring memory cell 122 can be programmed to a high level voltage either before or after the process of erasing the left bit 113 of the boundary memory cell 112. Thus, the voltage level at the right bit 123 of the neighboring memory cell 122 is larger than the voltage level at the left bit 113 of the boundary memory cell 112, such that leakage current is prevented. The above method is capable of reducing the leakage current during the erasing process. However, the above processing needs to be applied to the memory cells at each row of the flash memory 100, which is labor-consuming and requires a long duration of programming time.